The Value of Membership
Lu Dai discusses the value of Accellera membership during an interview with EDACafé
In a recent interview with Sanjay Gangal, president of IBSystems, Accellera Chair Lu Dai explains the value of Accellera membership for both user and vendor companies. During the interview at the 56th Design Automation Conference in Las Vegas, Lu describes how standards are initiated within the organization, as well as how companies can get involved and contribute to drive new standards development. He also discusses Accellera’s latest standards effort, the IP Security Assurance Working Group, as well as the UVM-AMS Proposed Working Group gauging industry interest in moving forward with developing a new standard.
UVM-AMS Proposed Working Group
The Accellera Board of Directors recently approved the formation of a Proposed Working Group (PWG) to focus on the standardization of analog/mixed signal extensions (AMS) for the Universal Verification Methodology (UVM) standard. There have been various proposals presented at recent DVCon events addressing the need for AMS extensions for UVM to enrich and improve the verification of analog/mixed-signal products and applications. Most of these proposals offer similar capabilities, but often use different implementations to resolve existing constraints enforced by UVM or to address limitations caused by mixing languages such as SystemVerilog and Verilog-AMS. The objective of the PWG is to explore the need for standardized UVM mixed-signal extensions and offer a unified approach for mixed-signal verification.
For more information on the UVM-AMS PWG, visit here.
Technical Tutorial: "Gain Valuable Insight into — and Make the Most Out of — the Changes and Features that Are Part of the New IEEE 1800.2 Standard for UVM"
Delivered at DVCon U.S. 2019 by Cliff Cummings of Sunburst Design, this tutorial dives into the changes and features that are part of the new IEEE 1800.2 standard for UVM. Cliff offers clarification and guidelines for UVM messaging and verbosities. He also explains the origins of the two different techniques to define UVM transactions and execute sequences, including the advantages and disadvantages of each. With this knowledge, viewers have a greater understanding of all publicly available UVM examples. Viewers also benefit from Cliff’s favorite UVM tips and tricks. View tutorial >
September 25-26, 2019
The Leela Palace Bengaluru
October 29-30, 2019
Holiday Inn Munich City Centre
Colocated with DVCon Europe 2019
October 31, 2019
Holiday Inn Munich City Centre
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- May newsletter now available
- UVM-AMS Proposed Working Group formed
- New article: A Unique Collaboration: Revitalizing Existing Standards While Preparing for the Future by Lu Dai and Stan Krolikoski
- Tom Fitzpatrick presented with 2019 Technical Excellence Award
- UVM 2017-1.0 Reference Implementation released - Download
- Presentations from SystemC Evolution Day 2018 now available
- Accellera Announces Proposed Working Group to Standardize UVM Analog/Mixed-Signal Extensions
April 24th, 2019
- Tom Fitzpatrick to Receive Accellera Systems Initiative Technical Excellence Award
February 19th, 2019
- Accellera Announces Availability of UVM 2017-1.0 Reference Implementation
November 13th, 2018